Amirkabir International Journal of Electrical & Electronics Engineering
Volume:45 Issue: 1, Winter - Spring 2013

Workspace analysis is one of the most important issues in the robotic parallel manipulator design. ‎However, ‎the unidirectional constraint imposed by cables causes this analysis more challenging in the cable driven redundant parallel manipulators. Controllable workspace is one of the general workspace in the cable driven redundant parallel manipulators due to the dependency on geometry parameters in the cable driven redundant parallel manipulators. In this paper, a novel tool is presented based on interval analysis for determination of ‎the boundaries and proper assessment of the enclosed region of controllable workspace of cable-driven redundant parallel manipulators. This algorithm utilizes the fundamental wrench interpretation to analyze the controllable workspace of cable driven redundant parallel manipulators. Fundamental wrench is the newly definitions that opens new horizons for physical interpretation of controllable workspace of general cable driven redundant parallel manipulators. ‎Finally, ‎the proposed method is implemented on a spatial cable driven redundant manipulator of interest.

AC railway traction loads are usually huge single phase loads. As a result, a significant amount of Negative Sequence Current (NSC) is injected into utility grid. Moreover, harmonics and consumption of reactive power are further power quality problems that the supply network is encountering. In this paper, a compensation strategy with the aid of Railway Power Conditioner (RPC) is proposed to overcome the abovementioned problems. Firstly, different kinds of traction transformers are evaluated and Y/Δ traction transformer is chosen. Then, a compensation strategy is initiated that is valid for all kinds of traction transformers and a control system is proposed based on that. Finally, the correctness of the analysis and proposed strategy is verified by the simulation results using Matlab/Simulink software.

In this paper, shielding effectiveness (SE) of a perforated enclosure with imperfectly conducting walls is evaluated. To this end, first, an accurate numerical technique based on method of Moments (MoM) is presented. In this method, lossy metallic walls of the enclosure are replaced by equivalent electric surface current sources. Then, the impedance boundary condition on the imperfectly conducting surfaces is applied and an electric field integral equation is extracted. At the end, the integral equation is solved numerically by Galerkin method. In addition to the mentioned numerical method, an extremely fast analytical technique based on transmission line model(TLM) is proposed which is able to predict the SE with high level of accuracy over a large frequency bandwidth just in a few seconds. For validation of both methods, othercommercial softwares (FEKO and CST) are employed and several enclosures with different conductivities are studied. Lossy MoM method shows accurate results for conductivities down to 1 S/m, while efficient TLM method proves its accuracy for conductivities down to 250S/m.

Internal Turn-Turn faults (TTF) are the most common failures in power transformers, which could seriously reduce their life expectancy. Although common protection schemes such as current-based differential protection are able to detect some of the internal faults, some other minor ones (such as TTFs and short circuit near the neutral point) cannot be detected by such schemes. Likewise, these relays may have false trip due to energizing inrush currents, transformer over excitation, and occurrence of CT saturation at one side. In this paper, a novel Linkage Flux Based (LFB) scheme is proposed to detect TTF in power transformers, which uses some Search Coils (SC) located on the transformer legs to sense the related linkage flux. Any difference in induced voltage in the corresponding SCs (located on any leg) suggests passing unsymmetrical linkage fluxes through them (unlike the normal conditions), which stands for the occurrence of a fault inside the transformer. The proposed technique not only can be used to protect power transformers, but also can be employed to find the fault location during repair activities, as well.

In this study an ultra-broad band, low-power, and high-gain CMOS Distributed Amplifier (CMOS-DA) utilizing a new gain-cell based on the inductively peaking cascaded structure is presented. It is created by cascading of inductively coupled common-source (CS) stage and Regulated Cascode Configuration (RGC). The proposed three-stage DA is simulated in 0.13 μm CMOS process. It achieves flat and high of 26.5 ± 0.4 dB over the frequencies range from DC up to 13 GHz 3-dB bandwidth, and it dissipates only 9.95 mW. The IIP3 is simulated and achieved -10 dBm at 6 GHz. Also, simulated input referred 1-dB compression point at 6 GHz achieves the value of -20 dBm. Both input and output matches are better than -11 dB. To obtain the low power and high gain requirements, the advantages of the bulk terminal are exploited in the proposed CMOS-DA. It adopts the method of forward body biasing in output MOS transistor to achieve higher transconductance and lower power consumption. Additionally, the Monte Carlo (MC) simulation is performed to take into account the risks associated with various input parameters which they receive little orno consideration in simulating of designs utilizing ideal components. MC simulation predicts an estimate of the good accuracy performance of the proposed design under various conditions.

A digital look-up table adaptive predistortion technique using a six-port receiver for power amplifier linearization is presented. The system is designed in Ka-band for a DVB-S2 satellite link. We use a six port receiver at the linearization loop in place of classic heterodyne receivers. The six-port receiver is implemented by the use of passive microwave circuits and detector diodes. This approach highly reduces cost and complexity of the linearization system. The fabrication results of a five-port receiver operating in 23–29 GHz is presented in this paper. The simulation results confirm suitability of using this architecture in the power amplifier linearization loop. The third order intermodulation products and the fifth order intermodulation products reduce about 43 dB and 25 dB respectively, after linearization ofthe power amplifier. The resulting spectrum of the output signal shows significant reduction of the intra-system interference to the adjacent networks which is mainly due to the nonlinearity effects of the power amplifier.