Bandwidth and Gain Extension Technique for CMOS Distributed Amplifiers Using Negative Capacitance and Resistance Cell

In this paper, a new structure composed of a negative capacitance and resistance is presented in order to increase gain and bandwidth of distributed amplifiers. The proposed structure is used at the gate transmission line of the distributed amplifier and the obtained circuit has been simulated using 0.13µm CMOS model. The negative capacitance at the gate transmission line decreases parasitic effects of gain cells and increases amplifier bandwidth and accordingly increases voltage gain. The generated negative resistance decreases transmission lines losses and increases bandwidth. Simulated voltage gain is 15dB with ±0.5 dB gain flatness over 0.5-49 GHz frequency band. Circuit input and output are matched with 50Ω resistance; and input and output return losses are -8.15 dB and -9.2 dB, respectively. This circuit has a noise figure less than 4.6 and its power consumption is 99 mW from 1.8 V power supply.