Design and Hardware Implementation of a Driver Drowsiness Detection System Based on TMAS320C5505A DSP Processor

Author(s):
Abstract:
Every year, many people lose their lives in road traffic accidents while driving vehicles throughout the world. Providing secure driving conditions highly reduces road traffic accidents and their associated death rates. Fatigue and drowsiness are two major causes of death in these accidents; therefore, early detection of driver drowsiness can greatly reduce such accidents. Results of NTSB investigations into serious and dangerous accidents, where drivers had survived the crash, pinpointed intense driver fatigue and drowsiness as their two major causes [1].
This research study first developed a database including brain signals from ten male volunteers under certain conditions. A combination of Wavelet Transform (WT) and Support Vector Machine (SVM) classifier was then used to propose a drowsiness level detection method which used only two EEG signal channels. A hardware system was then adopted for practical implementation of the proposed method. The building blocks of this hardware system included a two-channel module for receiving and pre-processing EEG signals based on a TMS320C5509A digital signal processor. This processor was adopted in this study for the first time for detecting drowsiness level, and a real-time implementation of the SVM classifier revealed its functionality. This is a portable system backed by a battery for a 10-hour operation. Results from simulation and hardware implementation of the proposed method on ten volunteers indicated an up-to-100 percent accuracy.
Works done on determining drowsiness level of drivers are two-fold: The first group uses shape and general conditions of the body with a focus on:Head movements
Eye tracking
Eye blink percent
There are a few hardware systems developed for this group. The second group of research works use biometric signals (e.g. ECG and EEG) to detect drowsiness level in drivers [2-4]. EEG signals are the most applied biometric signals for drowsiness level determination purposed due to their low risk and high reliability [21, 28]. Accordingly, EEG Signals were used in this work for the same purpose.
This research study first developed a database including brain signals from ten male volunteers under certain conditions. A combination of Wavelet Transform (WT) and Support Vector Machine (SVM) classifier was then used to propose a drowsiness level detection method which used only two EEG signal channels. A hardware system was then adopted for practical implementation of the proposed method. The building blocks of this hardware system included a two-channel module for receiving and pre-processing EEG signals based on a TMS320C5509A digital signal processor. This processor was adopted in this study for the first time for detecting drowsiness level, and a real-time implementation of the SVM classifier revealed its functionality. This is a portable system backed by a battery for a 10-hour operation. Results from simulation and hardware implementation of the proposed method on ten volunteers indicated an up-to-100 percent accuracy.
A proper, valid, and accessible database with sufficient data entries plays an important role in the success rate of proposed approaches. On the other hand, available databases were either inaccessible or their data were in no good condition or were insufficient. Therefore, a new database including EEG signals of ten male volunteers with the mean age of 24 and at least two years road driving experience was first developed for the purpose of this study. EEG signals of volunteers were recorded in two alertness and drowsiness modes during driving simulation using a driving simulator and driving computer game.
In most drowsiness level detection methods, more than two brain channels are usually used [20]; however, in this work, only two channels were used while maintaining the efficiency of drowsiness level determination. This made the system less cluttered for the driver, scaled down the processing workload for detecting and displaying the drowsiness level, reduced power consumption, and finally maximized the hardware system's operation time.
Recorded signals were pre-processed to prepare them for the next stages including feature extraction and classification. Spectral features related to a number of bands (especially, Alpha and Theta) were the main features ever used for this purpose. So far, wavelet transform (WT) has been an important method for extracting these bands and computing their related features [7-9]. In addition, for this purpose, SVM and neural networks have been widely used as classifiers [15, 16, 18]. In this study, however, WT and the energy of some frequency bands were adopted for feature extraction whereas SVM was used for classification.
Hardware-wise, very few studies have implemented their proposed approach. On the other hand, developments in applications of signal processors have raised their significance and also hope of using them in large scale processing algorithms, on a daily basis. Manufactured by Texas Instruments, TMS320C55xx family signal processors are an important and widely-used type [23]. Thanks to its low-consumption members, this family of processors is specialized for processing 1-D signals used in portable applications. Some of the main characteristics of this signal processors include low power consumption, fair prices, diverse functional peripherals (e.g. USB and McBSP), direct memory access (DMA), timer, LCD controller, supporting a number of major widely-used communication protocols, A/D converter, fast internal dual access memories, high operating frequency (typically 200 to 300 MHz), supporting dedicated signal processing instructions (such as the LMS and Viterbi algorithms), parallel execution of two commands. To the best of our knowledge, this signal processor has not been used for any drowsiness level detection applications. A major contribution of this paper was using a TMS320C5505A digital signal processor in a portable hardware system applied for drowsiness level detection of drivers.
The frequency band of EEG signals usually ranges from 0.5 to 30 Hz that is partitioned into delta (0.5 to 4 Hz), theta (4 to 8 Hz), alpha (8 to 13 Hz) and beta (13 to 30 Hz) sub-bands. EEG signal's energy is raised in low frequency bands (e.g. delta and theta) during meditation, deep relaxation and the alertness-to-fatigue transition. With regards to these major sub-bands, an FIR band-pass filter with high and low cut-off frequencies set at 30 and 0.3 Hz, respectively, was designed using the windowing method.
The developed hardware board had four inputs relating to two EEG signal channels (O1 and O2), a CZ reference channel and a ground signal. It had low power consumption (less than 25 mW) capable of operating for 10 hours with only two 3V CR2032 batteries. Using batteries with high A·h values would lead to longer circuit life. Signals from electrodes were pre-amplified and filtered in this board to remove noises outside the 0.5 to 30 Hz range.
The electronic board designed and developed for EEG signal processing and alertness/drowsiness detection incorporated a TMS320C5509A digital signal processor made by Texas Instruments. For converting analog to digital signals, the TLV320AIC23B codec was used, and a TPS767D301 IC supplied power to the digital signal processor, both made by Texas Instruments. In the circuit's power supply section, a fuse and a Zener diode were placed consecutively in the path for supplying a 5V voltage to the power IC. These two items served as a protection circuit together. This protection circuit would automatically cut off the power once the current exceeds the 500 mA threshold, protecting the circuit against any damage. The 6.5V Zener diode prevents excessive supply of input voltage to the power IC. The power IC consisted of two inputs providing two output voltages (1.6V and 3.3V) for the switch, which distributed them throughout the circuit. The codec IC had one microphone input and one stereo input. The two received EEG signal channels entered the stereo input and exited the converter in a series arrangement. This IC included constants that should have been properly programmed before the conversion operation. This could be done by the I2C protocol using SDA and SCL pins connected to the processor.
Language:
Persian
Published:
Signal and Data Processing, Volume:14 Issue: 1, 2017
Pages:
83 to 98
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