Security Enhancement of a Cryptographic Module with Partial Reconfiguration Capability

A method is proposed in this paper to enhance the security of communication systems. This method utilizes four cryptographic algorithms instead of one cryptographic algorithm. This will force the system to use one quadrature of each algorithm’s output stream. The Zynq system-on-chip from Xilinx Co. is used here and its fpga part is used for hardware implementation of these four cryptographic algorithms. Utilizing the four cryptographic algorithms leads to more hardware resource usage and is a challenging case. Partial reconfiguration is used here for solving this problem. Because of hardware implementation of these cryptographic algorithms, timing parameters of this design are all acceptable. Results show that not only the timing parameters are improved but also an enhanced security is achieved by using the four cryptographic algorithms instead of one cryptographic algorithm. A hardware resource utilization improvement of about 63% is achieved in comparison with traditional static implementation of the hardware.