Class-C VCO with Bias Regulator Circuitry for Enhanced Oscillation Swing and Robust Start-Up

A novel bias regulator circuitry is introduced for the class-C LC-VCO in this paper, that results in reduced phase noise and amplitude-enhanced and more robustness of start-up than conventional class-C VCO. Setting the bias voltage is such that in the start-up, Vbias to be larger than the threshold voltage and provide a safe start-up, then in the steady state oscillation, it goes less than Vth and increases the maximum oscillation amplitude. In the proposed bias circuitry, by combining the ring oscillator circuit and a rectifier and two inverters in the first stage, a step voltage signal is created which changes from 0 to VDD and then by applying it to the second stage and the switching operation of the transistors in this stage, the appropriate Vbias is provided. The proposed VCO is implemented in RF 0.18um CMOS process and is simulated by Cadence. Based on the post layout simulations results, the phase noise of the proposed VCO is -121.3dBc/Hz at 1MHz offset frequency from a 5GHz carrier and the power consumption is 2mW, resulting in a FoM of 192.24dBc/Hz.