Design of Low Phase Noise Oscillator in Dual Band Receivers

In this paper, a voltage controlled LC oscillator is proposed for various frequency band. In the design of the oscillator, the active inductor has been used with a controllable negative resistance method, which improves phase noise and has low power consumption. The circuit is simulated by ADS. The simulation results in the 0.18 μm TSMC CMOS technology shows that the oscillator has a phase noise of -143.682 dBc/Hz in band 1 (1.2 GHz) and at offset 1 MHz. The adjustable frequency range is from 0.72 to 1.25 GHz. Power consumption in the oscillator core is 2.6 to 3.4 mW, which is supplied from 1.8 volt source. Also, the oscillator has a phase noise of -136.174 dBc/Hz in band 2 (1.57 GHz) and at 1 MHz offset. The adjustable frequency range is 1.29 to 1.85 GHz. Power consumption in the oscillator core is also 2.6 to 3.5 mW. The simulation results indicate that the power consumption has been reduced by about 50%, and the phase noise has been improved by 16% to -136.174 dBc/Hz.