New XOR Structures in The Implementation of Compressor (4;2)with Carbon Nanotube Technology

In the field of digital electronics, it is very important to achieve faster and less power consuming circuits. Hence, improvements in the implementation of computational circuits, such as multipliers which are widely used in microprocessors, signal processing, and many cryptographic algorithms, are considered. In addition, the compressors are the most important operation unit in the multipliers. Amongst different compressors, compressor (4;2) is one of the most popular methods to implement of multipliers. Moreover, the implementation of this compressor depends primarily on XOR gates, and an appropriate XOR design is effectively improving the performance of compressor (4;2) and it can improve the overall performance of the multiplier system. In this paper, the design of compressor (4;2) is based on the proposed XOR gate with carbon nanotube transistors, which has been simulated in 32 nm CNTFET Stanford technology. Simulation results , shows that the proposed design, while reducing the circuit area, improve delay by 4.31% , power consumption by 45.99% and power delay product by 47.72%, in comparison with the best compressors.