Design of a highly linear low power low noise amplifier for UWB receivers

In this paper a interference-resistant ultra-wide-band low noise amplifier is presented in frequency range of 3.1-10.6 GHz for high data rate wireless communication and radio receiver. Second and third order input intercept point (IIP2 and IIP3) are enhanced in the novel circuit by new circuit structure and by adopting the Improved Complementary Derivative Superposition (ICDS), Forward Body Bias (FBB)and resistive feedback. The proposed LNA uses low pass filter and common source topology as wide-band input matching. Utilizing FBB technique reduce the threshold voltage and hence lower power consumption is achieved. The post-layout simulation of the proposed LNA in a 180 nm RF CMOS process show S11 less than - 10 dB in the entire band. Minimum of noise figure is 2.6 dB, power gain is about 11 dB, maximum of IIP3 and of IIP2 are 3.61 dB and 31.11 dB, respectively. The chip area is 734 mm ×870 mm. The DC power consumption is only 7.4 mW with 1.2V DC supply.