Journal of Electrical Systems and Signals
Volume:1 Issue: 1, 2013

In this paper, a soft switched high frequency ac link converter is studied as an alternative for dc link converters. The proposed configuration can overcome the disadvantages of dc link converter and offer an efficient, light weight, reliable converter with unity power factor and low current total harmonic distortion (THD). It employs 12 bi-directional switches interfacing with a partially resonating ac link consisting of an inductor and a small capacitor in parallel. The capacitor produces soft turn-off in all operating conditions, and control method guarantees zero voltage turn-on of the switches. Having close to zero switching power losses, this converter is capable of operating at high frequencies. This will result in smaller link inductor and filter elements. These characteristics make this converter an outstanding alternative for dc link converter. In this paper, the performance of the proposed converter along with a number of applications will be evaluated.

This paper presents a comprehensive framework for retailers’ financial policy which includes both electricity and demand response (DR) markets. Due to the existence of uncertainties in market environment, retailers may face with difficulties for purchasing electric energy from suppliers and selling it to their customers. If the selling price is not low enough, customers may choose a rival retailer. Demand Response Programs (DRPs) are introduced as a useful measure to mitigate a part of risks associated with these uncertainties. In this paper, a decision making framework is proposed which allows retailers to concurrently participate in energy market as well as the Demand Response Exchange (DRX) market to maximize their expected profit. This framework incorporates the elastic behavior of customers with respect to the electricity prices. Performance of the proposed approach is investigated through numerical studies using the Spain market data. The results show the efficiency and advantage of the proposed methodology.

Because of the remarkable market share of Generation Companies (GENCOs) in the restructured electricity market, GENCOs competition for supplying electric of power may occur under oligopolistic environment. In such condition, for the sake of maximum profit each GENCO should provide optimal bids. This paper focuses on the short-run bidding behavior of GENCOs under an oligopolistic power market, while the interaction among GENCOs is studied by game theory. In case of non-cooperative GENCOs competition, game theory proposed Nash equilibrium as an optimal bidding strategy for each GENCO. On the other hand, GENCOs can make alliances with each other in order to propose their coordinated bids, the so called coalition condition. It can be argued that, the coalition's optimal bidding strategy will be calculated via cooperative game theory. Then the obtained profit from such coalition will be allocated among its members based upon Shapley value. In this paper it is assumed that GENCOs submit their bidding blocks in an economic model of supply function equilibrium (SFE). In order to modeling optimal bidding strategy problem of each GENCO, the bi-level programming method is employed in this research. In the upper level, the profit of GENCOs were maximized and in the lower level, the Independent System Operator (ISO) with the aim of minimizing consumers’ payment subjected to secured operation of power system, will clear the market. The proposed methodology is implemented on a 30-bus IEEE test system; considering both non-cooperative and cooperative competitions, while GENCOs optimal bidding strategies is calculated. Numerical results show that the efficient alliance has impressive impact on GENCOs profits.

The cost of switching devices increases exponentially by increasing their rating. Hence, attractiveness of using unified power quality conditioners (UPQC) is reduced when compensation to be carried out for high power sensitive loads. In this paper, a new configuration for UPQC is presented. Using the fundamental power flow analysis, it is shown that by interchanging the position of series and parallel part of UPQC, the total rating of compensator decreases. To acquire more rating reduction, a new simple control algorithm is presented for voltage compensation by injecting the reactive power. Using numerical simulations, the performance of proposed and conventional configurations is compared to show their operational effectiveness and limitations in different loads and network conditions.

Area and power consumption are the most important parameters in integrated bio-potential signal amplifier with low noise and low bandwidth requirements. In this paper we present an analytical method for optimizing differential amplifiers for a constant input-referred noise level. Power- area optimization is performed over 1mHz to 10kHz in a 0.18μm CMOS technology. The amplifier consumes 22μA from a 1.8V power supply and the total equivalent input-referred noise over that bandwidth is equal to 2.4μVrms. The results, validated by SPICE circuit simulations, indicate that the amplifier can be optimized for specific input-referred RMS noise level.

This work describes a modified architecture for integrating analog-to-digital converters (ADC) for use in biomedical or any other applications where the input signal has small and slow variations. In this architecture, instead of digitizing every new analog sample independently, the difference of the new sample with the previous sample is converted to digital. With this idea, we can therefore considerably reduce the power consumption of the integrating ADC. In this paper, design considerations and simulation results of an 8-bit, 4 kS/s ADC in a 0.18μm CMOS technology are addressed to show the effectiveness of the idea. The proposed ADC is more power efficient when used for input signals that are very slow and have a small variation in voltage amplitude. Simulations confirm that the proposed ADC architecture shows more than 40% power saving compared to conventional architecture for an input signal amplitude of 0.2VFS.