Amirkabir International Journal of Electrical & Electronics Engineering
Volume:54 Issue: 2, Summer-Autumn 2022

In this paper, a tutorial review on several structural improvements of the CMOS folded-cascode operational transconductance amplifier (OTA) is presented. After a brief discussion on the structure and operation of the conventional folded-cascode amplifier, its several architectural improvements are reviewed. These improvements include advances on class A and class AB folded-cascode amplifiers and recycling folded-cascode amplifier. Then, several improved class A and class AB recycling folded-cascode operational transconductance amplifiers are discussed and finally some two-stage operational transconductance amplifiers based on the current recycling technique are reviewed. As it is seen, many architectural innovations have been proposed to improve both small-signal parameters including DC gain, unity-gain bandwidth, and phase margin, and large-signal operation, which is usually characterized by slew rate, in the proposed OTAs compared to the basic folded-cascode amplifier. Current recycling, shunt current sources, cross-coupled transistors to realize local positive feedback paths, local common-mode feedback, flipped voltage follower cells to realize the class AB operation, active current mirrors, and several other techniques have been utilized in the structural improvements of the basic folded-cascode operational transconductance amplifier. The achieved results are more promising and demonstrate substantial achievements in design of operational transconductance amplifiers in low-voltage and more scaled nano-meter CMOS processes.

The article begins with a brief review of those industrial and biomedical optical sensors which have been designed and fabricated in Photonics Research Laboratory, School of Electrical and Computer Engineering, University of Tehran. Firstly, development of a fiber-based fluid temperature and pressure sensing system is described. We describe fabrication procedure for the designed temperature and pressure sensors and elaborate on the interrogating electronic system for processing the sensor signals. Then, a frequency-modulation interferometric sensor enabling low-cost and highly sensitive refractive index measurement is presented. The sensor utilizes a setup based on free-space optics. Having introduced the first categories of sensors, we briefly describe transmission-line formulation (TLF) method which has been developed in our research group for the diffraction analysis of optical periodic structures. Application of this method to the design of a coupled cross-stacked guided-mode resonance sensor with a high surface sensitivity is demonstrated. We further review the design of dual-resonance nanostructured plasmonic sensors that can be used to differentiate background refractive index variation from adsorption of a layer on the sensing surface, and to estimate the thickness of adsorbed layers. Finally, we use the TLF method to design a spectrometer-free configuration for a dual-mode plasmonic sensor, which substantially simplifies the measurement setup.

In this work, we propose 6T cell with single-ended characteristics to achieve improved stability, decrease energy consumption and decrease leakage power. The cell is compared with strong 10 and 12 transistor structures with good and excellent specifications. However, the above structure is designed to have the best parameters with low size and a minimum number of transistors that reduce the size of the cell. In some parameters, such as the write noise margin, in comparison with other structures, the structure has the best merits, even higher than the structures of 12 and 10 transistors. The write operation is enhanced by cutting the pull-down path to the storage node to be written “1”; the read operation is performed without cutting the pull-down path. At VDD=0.4V, the static power, read margin, write margin, read energy, and write energy of the proposed structure are superior by 33%, 50%, 215%, 9%, and 5%, respectively, in contrast with the traditional 6T. The Electrical quality metric (EQM) parameter has been improved about ten times compared with the standard 6T structure, showing that the value of the new structure has been introduced. A Monte Carlo simulation of 5,000 read and write yields in the 32nm technology revealed that our cell has a 2x and 3.4x higher yield than the typical 6T cell. Consequently, the proposed 6T is an appropriate option for applications requiring low energy and high robustness.

Utilizing multiple logic instead of binary logic levels makes the same system to be realized with reduced number of internal connections and wiring, occupying smaller chip area while achieving higher operational speed. Due to the unique features nanotubes carbon tubes field effect transistors, as well as the possibility of designing different threshold voltages for transistors, designing multi-level logic systems is much simpler and less costly. Therefore, considering that the existing processing systems work on a dual basis, the design of binary to ternary converters and vice versa is very important and basic processing systems. In spite of all advantages mentioned, the multilevel logic systems relay on voltage dividing mechanism to provide suitable mid-voltage outputs. This, however, requires a direct current flow from supply voltage to the ground making the structure power hungry. Eliminating the mid-voltage outputs can help the structure to resemble binary design approach and be more power efficient as discussed in this paper. In this paper, pseudo ternary addition blocks, namely a half-adder, a full-adder block are designed and implemented based on CNTFET which try to eliminate '1' output for mid-stages wherever possible. The proposed adders are implemented, simulated and verified in HSPICE software using 32nm CNTFET technology. The simulation results reveal the proposed pseudo ternary full-adder block consumes just 1.037 μW power and has the propagation delay of 290 ps.

Despite the rapid development of perovskite-based light-emitting diodes (PeLEDs) within the last decade, the role of ion migration on the devices' operation has not been completely understood. It is considered the most complicated and mysterious process, affecting PeLED's operation. On one hand, it is widely accepted that the ion migration, as an intrinsic phenomenon, is one of the main origins for PeLEDs' low stability and on the other hand, the defect passivation caused by mobile ions gives rise to enhanced charge injection from the electron and hole transporting layers, leading to the more efficient light-emitting diodes. Therefore, it is critical to have a comprehensive insight into the underlying principles of ion migration and its contributing factors. In this paper, the ion migration phenomenon and its influence on the operation of a PeLED are surveyed using the Finite Element Method (FEM) simulation. The accumulation of anions and cations at the hole and electron transporting layer's interfaces with the perovskite facilitates hole and electron injection, respectively, which results in more carrier density favoring the radiative recombination. Thereupon, ion migration is a phenomenon that is closely related to the device's operation and stability, by controlling which a more stable PeLED is attainable. Our results provide a better understanding of the physics behind the ion migration which is the first step for designing more efficient devices.

Charge trapping in Gallium Nitride based devices affect their reliability and performance. In this work we study the dynamics of charge capture and emission in donor-like surface traps and the impact of trapped charges on transient response of the drain current in Gallium Nitride High Electron Mobility Transistors (GaN HEMTs). To simulate transient characteristics, traps are excited into their empty or filled state by applying initial pulse on gate (gate-lag technique) or on drain (drain-lag) and then the drain current is monitored during transition toward steady state condition. The results show up to 44% variation in drain current level, which reflects the importance of trapped charges in the device characteristics. The effect of physical parameters, including trap energy level and temperature have been characterized using gate and drain-lag. A simple physical model is proposed (based on the Arrhenius relation) and calibrated with simulation results to obtain the emission and capture time-constants. The results extracted from the physical model show that the time constant for capture and emission varies from few microseconds up to few seconds depending on temperature and trap energy level and the result are in good agreement with TCAD simulations. This is an important step toward incorporation of charge trapping effect into the charge-based compact model of GaN HEMTs.

This paper presents an active pixel sensor (APS) with a built-in readout circuit. A unity-gain buffer as a pixel readout circuit is used to read the signals of four adjacent pixels. Compared with the conventional four-transistor APS (4T-APS) which is connected to a CMOS source-follower readout circuit, the introduced circuit has higher accuracy, higher linearity, and fewer transistors. Due to the high linearity and accuracy of the pixel readout circuit, the proposed method can help to improve the final image quality of the sensor. For a fair comparison between the conventional 4T-APS (with source-follower readout circuit) and the proposed circuit, both circuits are designed with the same power consumption. Simulation results show that the proposed circuit is 16% more accurate, 11% higher fill factor, and 10 dB more linear than the conventional circuit. The total power consumption of the proposed circuit with a built-in buffer is almost 17 µW with a 1.8 V power supply and its layout size is 14.8µm×14.8µm. The total number of transistors used in this method to read the signals of four pinned-photodiodes is 11, whereas, in the conventional method, 16 transistors are required under the same circumstances. The proposed circuit is designed in 0.18µm CMOS technology.

A numerical study and simulation of cancerous tumor detection using the photoacoustic (PA) phenomenon and thermoacoustic with electric excitation (TATE) are presented. This report was in a small dimension of mimic breast tissue. Besides, the different layers of the breast were considered. The optical, thermal, elastic, electric, and acoustic characteristics of different layers of breast tissue and tumor at radiated laser wavelength (800 nm) and electric voltage pulse, were accurately calculated or obtained from reliable sources for the calculations to be done accurately and realistically; also, for accurate comparing of two methods, the amount and power of voltage and laser have been selected as the minimum allowable values. Therefore, it was possible to rely on the values and characteristics of the resulting data in comparing the accuracy and clarification of the two methods. A single suitable platform for simulating, which is commercially available Finite Element software (COMSOL®), has been selected. By using this platform, we were able to simulate these two methods from stimulation to propagation continuously. Finally, by studying the data matrix of two simulations, we can demonstrate the maximum difference of stress in and out of tumor in the two methods is about 0.1 Pa higher in PAT relative to the TATE. It means PAT is more accurate than TATE and the combination of these two methods can be ideal for the accurate and complete study of cancerous tumors.