Majlesi Journal of Electrical Engineering
Volume:6 Issue: 4, Dec 2012

In design of a parallel resonant Induction heating system, choosing a proper capacitance for the resonant circuit is quite important. The capacitance affects the resonant frequency, output power, heating efficiency and power factor. In this paper, with consideration to the function of equivalent series resistance (ESR), optimal capacitance is calculated. The induction heating resonance capacitor is achieved by using Smart Bacteria Foraging Algorithm (SBFA) under voltage and frequency constraints for minimizing cost function that is including: increasing the output power, efficiency of an induction heater, while decreasing the power loss of the capacitor. The proposed algorithm mimics chemotactic behavior of E.Coli bacteria to optimize parameters. The proposed algorithm enjoys individual and social intelligence, so that it can searches influx ways among hidden layers of the problem. Based on the equivalent circuit model of an induction heating system, the output power, and the capacitor losses are calculated. The effectiveness of the proposed method is verified by computer simulations, also improving the obtained results using SBFA are compared to classical bacteria foraging algorithm BFA.

Cognitive radio is a revolutionary technology that make significant progress in the effective use of frequency spectrum. The technology itself can be dynamically adjusted so that the proper utilization of available radio spectrum can be made. According to various studies conducted, It is observed that the bulk of each frequency band allocated to users leaving unused. The cognitive radio has the ability to use this parts of the spectrum that called spectrum holes. Inherent nature of this technology create the chance for attacker in these networks. This vulnerability that created due to the inherent nature of cognitive radio technology, Can severely impact on the safety and quality of service in this networks. In this paper, we focus on The primary user emulation attack. In this attack, an adversary transmits signals whose charactristics emulate those of incumbent signals. we proposed the method for reducing the effects of primary user emulation attacks in cognitive radio networks. This method suggests the technique that can merge with spectrum sensing method and can resistant this networks against the primary user emulation attacks. Finally with run some simulation, we examined the performance of this proposed method in detection of primary user emulation attacks in this networks.

This paper describes implementation of a low power and high-speed encryption algorithm with high throughput for encrypting the image. Therefore, we select a highly secured symmetric key encryption algorithm AES(Advanced Encryption Standard), in order to decrease the power using retiming and glitch and operand isolation techniques in four stages, control unit based on logic gates, optimal design of multiplier blocks in mixcolumn phase and simultaneous production keys and rounds. Such procedure makes AES suitable for fast image encryption. Implementation of a 128-bit AES on FPGA of Altera company has been done and the results are as follow: throughput, 6.5 Gbps in 441.5 MHz and 130mw power consumption. The time of encrypting in tested image with 32*32 size is 1.25ms.

Biomedical signals are always corrupted with different noises and interferences. Power Line Interference (PLI) is one of the most important interferences which decreases the quality of the biomedical signals significantly. In this paper a novel algorithm based on adaptive IIR Laguerre filters is proposed to eliminate the Power Line Interference (PLI) and its harmonics from Electromyography (EMG) signals. The proposed algorithm uses an internal mathematically constructed reference noise for the adaptive Laguerre filter, thus it is independent of the power line information to eliminate the noise. The Least Mean Square (LMS) algorithm is used to optimize the filter weights. Fixed and fuzzy step size approaches have been used to choose the step size of LMS method. This Laguerre filter consumes significantly less computational load than adaptive FIR filters and also has better stability than IIR filters. Our practical experiments showed that our Laguerre structures could eliminate the PLI of EMG signals successfully and it was more efficient than other adaptive algorithms.

Three new SRAM cells are proposed in this paper. Increasing area overhead is the major concern in SRAM designs. One of the new structures is included 4 transistors instead of 6 transistors as it is used in conventional 6T-SRAM cell for very high density embedded SRAM applications. The structure of proposed SRAM employs one word-line and one bit-line during read/write operation. The new SRAM cell has smaller size, leakage current and power dissipations in contrast of a conventional six transistors SRAM. A proposed 4T-SRAM cell has been simulated for 256 cells per bit-line and 128 columns cell for supply voltage of 1.2V. Furthermore, two other new structures are included 10 and 11 transistors. These new structures have separate read and write process by changing in the structure of conventional 6T SRAM to achieve high SNM. Using 10T and 11T SRAM cells lead to applying 512 cells per bit-line by reducing leakage current technique, while the cell is unavailable. 128 columns cell array has been built to measure the operation of SRAM cell. To achieve low power dissipation, the supply voltage for 10T and 11T are 0.32V and 0.27V, respectively. Proposed SRAM uses one read bit-line during read operation. Simulation results have been confirmed by HSPICE in 0.13um process.

In this paper,the influence of the voltage compensation type, active superconducting fault current limiter (ASFCL) is investigated under symmetrical and asymmetrical fault conditions. ASFCL is consisting of three air-core superconducting transformers and a three-phase voltage source converter. In normal (no fault) state, the flux in air core is compensated to zero, so the ASFCL has no influence on main circuit. In the case of short circuit, by controlling the amplitude and phase angle of the second winding’s current, the limiting impedance which is in series with the AC main circuit can be regulated and the fault current will be limited to a certain level.Control strategies consists of fault detection and PWM converter operation is designed. To simplify the design of controllers the mathematical equations can be expressed in synchronous rotating d-q frame.Also,under the condition that the active SFCL is placed behind the relay element, its current-limiting impedance will be added into the measured impedance between the relay and the fault points. As a result, in order to prevent the refused operation of the relay, According to the two different operation modes of the active SFCL, in this paper present the corresponding two modified formulas.using MATLAB SIMULINK, model of the Three phase AC system with ASFCL is created and control strategies test, fault current limiting test, and distance relay operation is investigated.

All oscillators are periodically time varying systems, so to accurate phase noise calculation and simulation, time varying model should be considered. Phase noise is an important characteristic of oscillator design. It defined as the spectral density of the oscillator spectrum at an offset from the center frequency of the oscillator relative to the power of the oscillator. In this paper, we study linear time invariant (LTI) and linear time variant (LTV) model’s to calculate phase noise, moreover we propose simple method for Impulse Sensitivity Function (ISF) calculation. Different oscillators have been selected to evaluate the proposed method. Simulation results show that the proposed method is simpler than other methods and we can easily simulation ISF

Road sign detection is important to a robotic vehicle that automatically drives on roads. As colors of any traffic road signs are only blue and red, in this paper, we use Hue- Saturation- Intensity (HSI) color space for color based segmentation at first. Using important geometrical features, the road signs are detected perfectly. After segmentation, it turns to classify every detected road signs. For this purpose we employ and compare the performance of three classifiers, they are distance to border (DTB), FFT sample of signature, and code matrix. In this work, we use the code matrix as an efficient classifier for the first time. Although the code matrix accuracy is greater than the two referred classifiers in average, the main advantage is simplicity and so less computational cost.

Distributed integrated circuit creation applies design methods that have been investigated for nearly seventy years to the rapidly evolving semiconductor process technologies of the modern IC landscape. Simply stated, it is an approach whereby the combination of multiple parallel signals results in increased bandwidths, enhanced power combining faculties, and often novel design capabilities for a given IC process. Consequently, the focus of this thesis is upon the application of distributed integrated circuit methodologies towards the realization of a distributed broadband amplifier in a commercial HEMT process technology. On-chip spiral inductors were utilized in on-chip bias circuitry. The measured performance of the DA was found to be significantly degraded from that of initial simulation by the poor performance of the fabricated inductors. In addition to serving as a portion of the author''s thesis requirements, the fabricated chips are to be incorporated into a university laboratory session in subsequent semesters. We present an analysis of distributed amplifiers suitable for use in the microwave regime. The 4- stage design achieves 15.5 dB of power gain (±0.5 dB) from 3.1 to 10.6 GHz. Reflected power at the input and output from loads matched to 50 Ohms are all below –10 dB over the bandwidth of the device, as is power transmitted from the output to the input. The device is stable for broad range of input and output loads.

Soft switching techniques have recently been used in the design of DC-AC converters, in order to achieve better performance, higher efficiency and power density. One of the soft switching techniques applied in inverters is resonant DC links. These topologies have some disadvantage such as irregular current peak, large voltage peaks, uncontrollable pulse width, etc. Another soft switching method in inverters is using quasi resonant links, which have PWM modulation capability. In this regard, an inverter with a novel quasi resonant parallel DC link with capability EDPWM (Enhanced Double PWM) which uses of single-phase soft switching technique (SPSS) is introduced. This circuit provides the inverter with two to three ranges of PWM control capability which increases the switching time control is larger range. Various operational modes of this novel quasi resonant DC link are analyzed. Finally, simulation results by PSPICE software are presented to justify the circuit operation.