Log-Domain Based Implementation of Izhikevich Neuron Model

Various models are presented for reproducing nonlinear biological neural dynamics, which the Izhikevich model is one of the best of them in complexity and accuracy. Silicon neuron is a compact transistor-based circuit for implementing neural models. In this paper, we present a compact ultra low-power low area silicon neuron of the Izhikevich model based on log-domain integrators. In the proposed circuit, area and static power are decreasedby reducing the value of capacitors and bias currents. Moreover, we have a ultra low dynamic power consumption by reducing voltage swing of the comparator. Also, In the peak current detector a practical huge resistance current source is used. The simulations performed in standard CMOS 180nm technology. Accordingto our experiments, the power and area are enhanced from 1.65nW and 1100μm2 to 650pW and 180μm2, respectively. Our design at present reproduces 12 of cortical patterns with only 3 tuning parameters.