A New Topology for Single Phase Voltage Source Multilevel Inverter Based on Reduction of Semiconductor Switches

This paper proposes a new topology for three phase cascaded multilevel converter based on multilevel modules (MLM) and three-phase bridge. The main advantages of the proposed topology, compared to the other topology converter are significantly reduction of the number of power switches and diodes as the number of output voltage levels increases. To achieve the proper levels in the output voltage, an algorithm is introduced to determine the value of DC sources. In the other part of this study, is introduced the determining the minimum values of switches, diode, DC sources, so on to gain the maximum levels at the output voltage. Also, how specifying the switching interval in order to reduce the total harmonic distortion (THD) is proposed that using this switching method, the output voltage THD is minimized. To show the validity of proposed topology, a 125 level three-phase inverter is designed and simulated using PSpice. In addition, to verify the performance of proposed configuration in desired output voltage generation, a sample output voltage containing 3th and 5th harmonic is generated using this topology and the obtained results are evaluated.