Line Sensitivity Enhancement of Low Power Voltage Reference Circuits Using a Novel Two Stage Structure in Subthreshold

In this paper, a new method for improving line sensitivity of a low voltage and low power voltage reference is presented. In this new proposed topology, a bandgap voltage reference is used in the first stage and significantly improved line sensitivity through feeding supply voltage of a thermal voltage reference in the second stage. In comparision to similar counterparts, this structure has better line sensitivity and in the order of 0.079 %/V. Due to the use of subthreshold regime MOSFETs, optimized design and also low supply voltage of 250 mV, the obtained power dissipation is about 32.6 pW which is categorized in low power voltage references. The proposed circuit is simulated in a 0.18um CMOS process and for evaluation in near to reality conditions, effects of process and mismatch on the circuit’s performance are also investigated in this work.