Iranian Journal of Electrical and Electronic Engineering
Volume:19 Issue: 1, Mar 2023

A novel hybrid method for tracking multiple indistinguishable maneuvering targets using a wireless sensor network is introduced in this paper. The problem of tracking the location of targets is formulated as a Maximum Likelihood Estimation. We propose a hybrid optimization method, which consists of an iterative and a heuristic search method, for finding the location of targets simultaneously. The Levenberg-Marquardt (LM) algorithm is used for iterative search, while the Particle Swarm Optimization (PSO) is used for the heuristic search. We use the maximum sensors separating distance-grouping algorithm (G-MSSD), which was introduced in our previous work, to generate initial guesses for search algorithms. The estimates of both methods are compared and the best one is selected as the final estimation. We demonstrate the accuracy and performance of our new tracking method via simulations and compare our results with the Gauss-Newton (GN) method.

In this paper, parasitic capacitors and common mode voltage (CMV) are modeled in a delta connection multilevel cascaded STATCOM. In high frequency and high voltage applications the parasitic capacitors play important role in common mode voltages. In this paper, parasitic capacitors and CMV are modeled in a multilevel cascaded STATCOM and also parasitic currents are calculated, then a method will be proposed to reduce the effects of the parasitic capacitors. The values of parasitic capacitors are calculated by finite element software. Finally, a delta connection 13-level cascaded STATCOM with parasitic capacitors will be simulated in MATLAB Simulink and then simulation results will be presented.

In the CMOS circuit power dissipation is a major concern for VLSI functional units. With shrinking feature size, increased frequency and power dissipation on the data bus have become the most important factor compared to other parts of the functional units. One of the most important functional units in any processor is the Multiply-Accumulator unit (MAC). The current work focuses on the development of MAC unit bus encoders as well as the identification of an improved architecture for image processing applications. To reduce the power consumption in these functional units, two bus encoding architectures were developed by encoding data before it was sent on the data buses. One is MSB reference encoding, and another is Fourth and Fifth bit ANDing (FFA) without the need for an extra bus line with fewer transitions by using gray codes. The comparison of the proposed encoding architectures with the existing encoding architectures from the literature revealed an 8% to 36% significant improvement in power dissipation. The simulation was done with Xilinx ISE, and the Cadence RTL Compiler tool was utilized for the synthesis, which was done with the 180nm technology library. And also, the image filtering is analyzed using MATLAB.

A novel nonlinear controller is proposed to track active and reactive power for a Brushless Doubly-Fed Induction Generator (BDFIG) wind turbine. Due to nonlinear dynamics and the presence of parametric uncertainties and perturbations in this system, sliding mode control is employed. To generate a smooth control signal, dynamic sliding mode method is used. Uncertainties bound is not required in the suggested algorithm, since the adaptive gain in the controller relation is used in this study. Convergence of the sliding variable to zero and adaptive gain to the uncertainty bound are verified using Lyapunov stability theorem. The proposed controller is evaluated in a comprehensive simulation on the BDFIG model. Moreover, output performance of the proposed control algorithm is compared to the conventional and second-order sliding mode and proportional-integral-derivative (PID) controllers.

We propose a real-time Yolov5 based deep convolutional neural network for detecting ships in the video. We begin with two famous publicly available SeaShip datasets each having around 9,000 images. We then supplement that with our self-collected dataset containing another thirteen thousand images. These images were labeled in six different classes, including passenger ships, military ships, cargo ships, container ships, fishing boats, and crane ships. The results confirm that Yolov5s can classify the ship's position in real-time from 135 frames per second videos with 99 % precision.

This article discusses the operating principle and simulation of closed loop control of a three phase induction motor (IM) powered by five level diode clamped multilevel inverter (DCMLI) using direct torque control (DTC) technique. The main purpose of this article is to regulate the torque and speed of an IM and to decrease total harmonic distortion (THD). In this article, a five-level inverter's direct modulation approach with the dc link voltage self-balancing is presented. To reduce capacitor voltage variation, the redundancies of various switch topologies for the creation of intermediate voltages are also used. The use of LC filter results in lower output voltage and current distortion. A multicarrier PWM control technique is used for DCMLI to provide high quality sinusoidal output voltage with decreased harmonics. This can be obtained by employing Sinusoidal Pulse Width Modulation (SPWM) method for speed and torque control. This demonstrates that the recommended method of controlling the motor's speed and torque is effective. The simulation result reveals that DTC for the five-level inverter fed IM drive gives a rapid dynamic response, lower voltage and current THDs, and much less flux and torque distortion. The simulation is carried out in MATLAB Simulink (R2014).

Shamir’s secret sharing scheme is one of the substantial threshold primitives, based on which many security protocols are constructed such as group authentication schemes. Notwithstanding the unconditional security of Shamir's secret sharing scheme, protocols that are designed based on this scheme do not necessarily inherit this property. In this work, we evaluate the security of a lightweight group authentication scheme, introduced for IoT networks in IEEE IoT Journal in 2020, and prove its weakness against the linear subspace attack, which is a recently-proposed cryptanalytical method for secret sharing-based schemes. Then, we propose an efficient and attack-resistant group authentication protocol for IoT networks.

In this paper, a Li-Ion Battery Charger Interface (BCI) circuit with fast and safe charging for portable electronic devices is proposed. During the charging of Li-Ion battery, current spikes due to asynchronous control signals, and temperature are factors that greatly affect battery performances and life. This circuit has the following features: prevents current spikes and also incorporates a permanent battery temperature monitoring block. The BCI uses a dual current source and generates a constant current in a large current mode of 1.5 A, further reducing charging time. The proposed BCI was designed and simulated in Cadence Virtuoso using TSMC 180 nm technology. The simulation results of the control signals show that the proposed architecture was able to eliminate the current drifts and keep the battery temperature within the normal operating range.

In this paper, a flexible pulsed power generator (FPPG) based on the solid-state Marx Structure is designed to create a wide range of pulses for cancer treatment. Pulse with different characteristics is needed to treat different samples depending on their type, dimensions, and impedance. Also, with the change in pulse widths, the pulse characteristics suitable for treatment change widely. With conventional semiconductor base Marx generators, due to the limitations in their rise time, current level, and impedance characteristics, it is not possible to generate a wide range of pulse characteristics, especially for low impedance loads. The FPPG by changing the connection mode of two Marx generators, can decrease the generator impedance for low impedance loads, increase the output current and voltage amplitude and repetition rate, and generate pulse width from nanosecond to several hundred microseconds. The simulation of FPPG in OrCAD-PSpice software shows its proper functioning.

This paper introduces the modeling and fault diagnosis of rotor eccentricities of permanent magnetic synchronous machine (PMSM). The modeling of machine in healthy and fault condition have been proposed based on magnetic equivalent circuit (MEC). Nevertheless, the research methods of diagnosis and modeling are common, this paper tends to provide a fast computation and more detailed model with reasonable degree of accuracy. Firstly, the MEC modeling of PMSM in the electric and magnetic fields are introduced and next, the different fault conditions are carried out. Also to consider the eccentricity fault of an interior mounted PMSM, a methodology based on MEC is proposed. The accuracy of this model will be verified by comparing with identical results obtained by finite element method (FEM).

The Global Positioning System (GPS) is vulnerable to various deliberate and unintentional interferences. Therefore, identifying and coping with various interferences in this system is essential. This paper analyzes a method of reducing the dimensions of Cross Ambiguity Function (CAF) images in improving the identification of spoofing interference at the GPS using Multi-Layer Perceptron Neural Network (MLP NN) and Convolutional Neural Network (CNN). Using the proposed method reduces data complexity, which can reduce the number of learning data requirements. The simulation results indicate that, by applying the proposed image processing algorithm for different dimensions of CAF images, the CNN performs better than MLP NN in terms of training accuracy; the MLP NN is superior to CNN in terms of convergence speed of training. In addition, the results demonstrate that the operation of the proposed method is appropriate in the case of small-delay spoofed signals. Therefore, for the intervals above 0.25 code chip, the proposed method detects spoofing attacks with a correct detection probability close to one.

Multi-Speed resolvers are desirable position sensors for high performance closed-loop control of inverter driven machines due to their high accuracy. However, developing a winding with high number of poles with limited number of slots is a main challenge in achieving multi-speed function. Therefore, in this paper different winding configuration are proposed to achieve 5-X performance of a disk type wound-rotor resolver. Then, the best winding is chosen for experimental verification. In addition to the accuracy of the sensor, the optimal winding selection index is defined considering copper usage, number of winding layers (overlapping or non-overlapping configurations), the number of turns for each coil of the winding (variable or constant turn configurations), and the amplitude of the fundamental harmonic. An objective function is defined involving all the mentioned indices with different weights determined based on the importance of each index. Finally, a prototype of the sensor with the best winding is built and tested. The experimental measurements verify the results of the simulations that are obtained using 3-D time setting finite element analysis.

In today's technological environment, designing the Static Random Access Memory (SRAM) is most vital and critical memory devices. In this manuscript, two kinds of 5TSRAM are designed using different CNTFET such as Dual-ChiralityGate all around (GAA) CNTFET and Ballistic wrap gate CNTFET based 5T SRAM cell designs for enhancing the read/write assist process. Here, the proposed Dual-ChiralityGAA-CNTFET based 5T-SRAM has two cross-coupled inverters using one access transistor that is connected to the bit line (BL) and word line (WL) through minimum supply voltage. Instead of cross-coupled inverter circuit, the BWG-CNTFET based 5T-SRAM cell is intended for achieving less power and improved read/write assist process. Also, one transistor is executed as low-threshold (LVT) device in the proposed BWG-CNTFET based 5T-SRAM. Thus, proposed two kinds of 5T SRAM cells increases the read/write assist operation and reduce the leakage current/ power. The simulation of the proposed two kinds of 5T SRAM cell is done by HSPICE simulation tool and the performance metrics are calculated. Therefore, the proposed Dual-ChiralityGAA-CNTFET based 5T-SRAM cell design has attained 11.31%, 51.47% lower read delay, 44.44%, 26.33% lower write delay, 36.12%, 45.28% lower read power, 34.5% , 22.41% lower write power, 37.4%, 15.3% higher read SNM and 35.8%, 12.09% higher write SNM than Double gate carbon nanotube field effect transistors (DG CNTFET) and state-of-art method respectively. Similarly, the proposed BWG-CNTFET 5T SRAM cell design has attained 45.53%, 38.77% lower write delay, 56.67%, 45.64% lower read delay, 58.4%, 56.75% lower read power, 49.66%, 28.56% lower write power, 35.32%, 12.7% higher read SNM and 45.8%, 15.6% higher write SNM than Reduced Power with Enhanced Speed (RPES) approach and state-of-art method respectively.