Design of continuous time feed forward quadrature Modulator for multi-standard receivers
In this paper, a continuous-time (CT) third order multi standard low pass (LP) quadrature delta sigma modulator (QDSM) for low-IF receiver is designed. The proposed modulator is capable of supporting WLAN / WCDMA / GSM standards receivers at two real and quadrature mode. The adder Op-Amps at the end of the loop filter are eliminated to reduce the power consumption. This modulator is employed in real mode and single bit quantizer in GSM standard. To achieve the required bandwidth and SNR is worked in multi-bit quadrature mode in WLAN / WCDMA standards. The complex DAC (C_DAC) is designed to eliminate the mismatch between I and Q paths. This modulator is Implemented in 180 nm CMOS technology, and SNRs at transistor level are 54/ 75.9 / 81.63, and FOMs are 0.828 / 0.485 / 1.63 (pj / conv), for WLAN / WCDMA / GSM modes, respectively. The new structure has a better FOM at the WLAN / WCDMA operating modes compared to similar cases.
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