Novel robust quantum-dot cellular automata (QCA) full adder in the one-dimensional clock

Quantum-dot cellular automata technology has emerged as an alternative for complementary metal oxide semiconductor  technology in very-large-scale integration (VLSI) circuits. The basis and structure of QCA technology are different from CMOS technology, and it is necessary to redesign the existing circuits based on the characteristics of QCA technology. In this paper, first, five-input and three-input majority gates are proposed with the ability to work in the one-dimensional clock. Then a full adder based on the proposed majority gates in the one-dimensional clock was designed with 0.75 clock cycle latency. As a consequence of the location of the circuit’s inputs & outputs, this full adder can easily be converted to a multi-bit adder. This paper introduces a four-bit adder utilizing the same method, endeavoring to design the circuit compliant with the inherent features of QCA technology and prove that the proposed circuit can be constructed. For design as well as manufacturing process simplicity, a general framework for design (in one-dimensional clock) is also hereby proposed. Proposed designs are confirmed by QCADesigner, a well-known QCA layout design and verification tool, and QCADesigner-E for power analysis.