Continuous allocation and hybrid migration of processors to improve the performance of online mapping on a 2-D network on chip

The network on chips was introduced as a solution to improve coherence between the network components. As one aspect of the network on chip design is mapping, so, in this paper, we have presented different concepts and parameters in the online mapping for different jobs in the network on chips. Thus, three essential steps are considered in the online mapping for different jobs in the network on chips which are finding the appropriate size of sub-mesh for input job, finding a sub-mesh place in integrating the mesh for online job allocation and finding the main place in sub-mesh. Also, previous efficient models to select the dimensions of the sub-mesh, MD, MPN and MT&MPN, previous processor allocation mechanisms, TRB and TCB, and the traditional processor migration methods based on two-column boundary, two-row boundary, limited left-right compaction, and limited top-down compaction for mesh topology are considered and compared against the proposed hybrid migrations. The mentioned algorithms are used to increase continuity and decrease latency in multiprocessor systems. Since the main goal in the development of the proposed methods is to achieve the maximum performance, so in this process, the impact of different performance parameters will be compared against the previous mechanisms. In this paper, 6 algorithms, which have achieved better performance, have been selected among the 45 ones. We have demonstrated that using hybrid migration strategies enable us to limit the number of processors migrations. Moreover, MT&MPN/TCB/HCM has revealed better results among these algorithms with the average job execution time %38.0248, average job response time %99.5387, and average system utilization %48.0239. Indeed, simulation results show that MPN/TRB/HBM has maximum results of the average power consumption %6.68, and the best results of the average job execution time %38.21.