Hardware Implementation of an Improved Acquisition Block in GPS Receivers in Weak Signal Environments Based on FPGA

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Article Type:
Research/Original Article (دارای رتبه معتبر)
Abstract:

Due to the increase in satellite-based positioning applications and their importance in daily life, the need for high-sensitivity receivers to acquire weak signals in limited environments such as tunnels, environments with tall buildings and streets between them, and similar things seems necessary. In a software receiver, the first and most important step is the acquisition of GPS signals. The purpose of this step is to determine the visible satellites and find the approximate values of the carrier frequency and code delay of the signals sent from the satellites. GPS receivers in weak signal conditions often face the problems of Doppler code and navigation data bit sign transition, which reduce the output SNR of the acquisition stage. One of the new methods that can overcome the problems of Doppler code and navigation data bit sign transition is the Improved Semi-bit Compensation (ISBC) acquisition method. This paper has implemented this method in the FPGA platform. In addition, due to the multiplicity of signal processing steps in GPS receivers, this paper has achieved an improvement in implementation by simplifying its design and implementation steps, compared to the previous methods, and with the minimum SNR value of -43.3dB, it has been able to successfully pay for the acquisition of at least four satellites.

Language:
Persian
Published:
Marine Technology, Volume:11 Issue: 4, 2025
Pages:
31 to 44
https://www.magiran.com/p2828393